System Settings

 
Environment Settings
Environment Variable xst ngdbuild map par
PATHEXT .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC;
.tcl;
.wlua;
.lexe		 .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC;
.tcl;
.wlua;
.lexe		 .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC;
.tcl;
.wlua;
.lexe		 .COM;
.EXE;
.BAT;
.CMD;
.VBS;
.VBE;
.JS;
.JSE;
.WSF;
.WSH;
.MSC;
.tcl;
.wlua;
.lexe
Path C:\Xilinx\14.4\ISE_DS\ISE\\lib\nt;
C:\Xilinx\14.4\ISE_DS\ISE\\bin\nt;
C:\Program Files\CollabNet;
C:\Program Files\Haskell\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\lib\extralibs\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\bin;
C:\Python27\Lib\site-packages\PyQt4;
C:\Program Files\CodeGear\RAD Studio\5.0\bin;
C:\Users\Public\Documents\RAD Studio\5.0\Bpl;
c:\ds\msys\bin;
C:\Program Files\Microchip\mplabc18\v3.38\mpasm;
C:\Program Files\Microchip\mplabc18\v3.38\bin;
C:\Program Files\ActiveState Komodo IDE 5\;
C:\WinAVR\bin;
C:\WinAVR\utils\bin;
C:\Tcl\bin;
C:\Windows\system32;
C:\Windows;
C:\Windows\System32\Wbem;
C:\Windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Common Files\Lenovo;
C:\Program Files\Common Files\Ulead Systems\MPEG;
C:\Program Files\Lenovo\Access Connections\;
C:\Program Files\Lenovo\Client Security Solution;
C:\Program Files\Altium Designer Winter 09\System;
C:\Program Files\Microchip\MPLAB C32 Suite\bin;
C:\Program Files\HI-TECH Software\PICC\9.70\bin;
C:\Program Files\Mercurial\;
C:\PROGRA~1\DISKEE~1\DISKEE~1\;
C:\Program Files\clisp;
C:\Program Files\IVI Foundation\IVI\bin;
C:\PROGRA~1\IVIFOU~1\VISA\WinNT\Bin;
C:\Program Files\Ghdl\Bin;
c:\iverilog\bin;
C:\Program Files\Lua\5.1;
C:\Program;
C:\Program Files\Git\cmd;
C:\Program Files\Microsoft Windows Performance Toolkit\;
C:\Program Files\Agilent\IO Libraries Suite\bin;
C:\Program Files\IVI Foundation\VISA\WinNT\agvisa;
C:\Program Files\IVI Foundation\VISA\WinNT\Bin\;
C:\Program Files\Calibre2\;
c:\python27\Scripts;
C:\Kivy-1.5.1-w32\python;
C:\Program Files\Microsoft Visual Studio 9.0\VC\bin;
c:\jython;
c:\ds\devkitARM\bin;
c:\MinGW\bin;
c:\Program Files\hidemaru;
C:\Program Files\Vim\vim73;
C:\Program Files\Racket;
c:\altera\11.1\modelsim_ase\win32aloem;
c:\xilinx\14.1\ISE_DS\ISE\lib\nt;
c:\d\windows\bin;
c:\veritakwin;
C:\Xilinx\src\simple_logiana4>\Xilinx\14.1\ISE_DS\ISE\bin\nt		 C:\Xilinx\14.4\ISE_DS\ISE\\lib\nt;
C:\Xilinx\14.4\ISE_DS\ISE\\bin\nt;
C:\Program Files\CollabNet;
C:\Program Files\Haskell\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\lib\extralibs\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\bin;
C:\Python27\Lib\site-packages\PyQt4;
C:\Program Files\CodeGear\RAD Studio\5.0\bin;
C:\Users\Public\Documents\RAD Studio\5.0\Bpl;
c:\ds\msys\bin;
C:\Program Files\Microchip\mplabc18\v3.38\mpasm;
C:\Program Files\Microchip\mplabc18\v3.38\bin;
C:\Program Files\ActiveState Komodo IDE 5\;
C:\WinAVR\bin;
C:\WinAVR\utils\bin;
C:\Tcl\bin;
C:\Windows\system32;
C:\Windows;
C:\Windows\System32\Wbem;
C:\Windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Common Files\Lenovo;
C:\Program Files\Common Files\Ulead Systems\MPEG;
C:\Program Files\Lenovo\Access Connections\;
C:\Program Files\Lenovo\Client Security Solution;
C:\Program Files\Altium Designer Winter 09\System;
C:\Program Files\Microchip\MPLAB C32 Suite\bin;
C:\Program Files\HI-TECH Software\PICC\9.70\bin;
C:\Program Files\Mercurial\;
C:\PROGRA~1\DISKEE~1\DISKEE~1\;
C:\Program Files\clisp;
C:\Program Files\IVI Foundation\IVI\bin;
C:\PROGRA~1\IVIFOU~1\VISA\WinNT\Bin;
C:\Program Files\Ghdl\Bin;
c:\iverilog\bin;
C:\Program Files\Lua\5.1;
C:\Program;
C:\Program Files\Git\cmd;
C:\Program Files\Microsoft Windows Performance Toolkit\;
C:\Program Files\Agilent\IO Libraries Suite\bin;
C:\Program Files\IVI Foundation\VISA\WinNT\agvisa;
C:\Program Files\IVI Foundation\VISA\WinNT\Bin\;
C:\Program Files\Calibre2\;
c:\python27\Scripts;
C:\Kivy-1.5.1-w32\python;
C:\Program Files\Microsoft Visual Studio 9.0\VC\bin;
c:\jython;
c:\ds\devkitARM\bin;
c:\MinGW\bin;
c:\Program Files\hidemaru;
C:\Program Files\Vim\vim73;
C:\Program Files\Racket;
c:\altera\11.1\modelsim_ase\win32aloem;
c:\xilinx\14.1\ISE_DS\ISE\lib\nt;
c:\d\windows\bin;
c:\veritakwin;
C:\Xilinx\src\simple_logiana4>\Xilinx\14.1\ISE_DS\ISE\bin\nt		 C:\Xilinx\14.4\ISE_DS\ISE\\lib\nt;
C:\Xilinx\14.4\ISE_DS\ISE\\bin\nt;
C:\Program Files\CollabNet;
C:\Program Files\Haskell\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\lib\extralibs\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\bin;
C:\Python27\Lib\site-packages\PyQt4;
C:\Program Files\CodeGear\RAD Studio\5.0\bin;
C:\Users\Public\Documents\RAD Studio\5.0\Bpl;
c:\ds\msys\bin;
C:\Program Files\Microchip\mplabc18\v3.38\mpasm;
C:\Program Files\Microchip\mplabc18\v3.38\bin;
C:\Program Files\ActiveState Komodo IDE 5\;
C:\WinAVR\bin;
C:\WinAVR\utils\bin;
C:\Tcl\bin;
C:\Windows\system32;
C:\Windows;
C:\Windows\System32\Wbem;
C:\Windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Common Files\Lenovo;
C:\Program Files\Common Files\Ulead Systems\MPEG;
C:\Program Files\Lenovo\Access Connections\;
C:\Program Files\Lenovo\Client Security Solution;
C:\Program Files\Altium Designer Winter 09\System;
C:\Program Files\Microchip\MPLAB C32 Suite\bin;
C:\Program Files\HI-TECH Software\PICC\9.70\bin;
C:\Program Files\Mercurial\;
C:\PROGRA~1\DISKEE~1\DISKEE~1\;
C:\Program Files\clisp;
C:\Program Files\IVI Foundation\IVI\bin;
C:\PROGRA~1\IVIFOU~1\VISA\WinNT\Bin;
C:\Program Files\Ghdl\Bin;
c:\iverilog\bin;
C:\Program Files\Lua\5.1;
C:\Program;
C:\Program Files\Git\cmd;
C:\Program Files\Microsoft Windows Performance Toolkit\;
C:\Program Files\Agilent\IO Libraries Suite\bin;
C:\Program Files\IVI Foundation\VISA\WinNT\agvisa;
C:\Program Files\IVI Foundation\VISA\WinNT\Bin\;
C:\Program Files\Calibre2\;
c:\python27\Scripts;
C:\Kivy-1.5.1-w32\python;
C:\Program Files\Microsoft Visual Studio 9.0\VC\bin;
c:\jython;
c:\ds\devkitARM\bin;
c:\MinGW\bin;
c:\Program Files\hidemaru;
C:\Program Files\Vim\vim73;
C:\Program Files\Racket;
c:\altera\11.1\modelsim_ase\win32aloem;
c:\xilinx\14.1\ISE_DS\ISE\lib\nt;
c:\d\windows\bin;
c:\veritakwin;
C:\Xilinx\src\simple_logiana4>\Xilinx\14.1\ISE_DS\ISE\bin\nt		 C:\Xilinx\14.4\ISE_DS\ISE\\lib\nt;
C:\Xilinx\14.4\ISE_DS\ISE\\bin\nt;
C:\Program Files\CollabNet;
C:\Program Files\Haskell\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\lib\extralibs\bin;
C:\Program Files\Haskell Platform\2011.4.0.0\bin;
C:\Python27\Lib\site-packages\PyQt4;
C:\Program Files\CodeGear\RAD Studio\5.0\bin;
C:\Users\Public\Documents\RAD Studio\5.0\Bpl;
c:\ds\msys\bin;
C:\Program Files\Microchip\mplabc18\v3.38\mpasm;
C:\Program Files\Microchip\mplabc18\v3.38\bin;
C:\Program Files\ActiveState Komodo IDE 5\;
C:\WinAVR\bin;
C:\WinAVR\utils\bin;
C:\Tcl\bin;
C:\Windows\system32;
C:\Windows;
C:\Windows\System32\Wbem;
C:\Windows\System32\WindowsPowerShell\v1.0\;
C:\Program Files\Common Files\Lenovo;
C:\Program Files\Common Files\Ulead Systems\MPEG;
C:\Program Files\Lenovo\Access Connections\;
C:\Program Files\Lenovo\Client Security Solution;
C:\Program Files\Altium Designer Winter 09\System;
C:\Program Files\Microchip\MPLAB C32 Suite\bin;
C:\Program Files\HI-TECH Software\PICC\9.70\bin;
C:\Program Files\Mercurial\;
C:\PROGRA~1\DISKEE~1\DISKEE~1\;
C:\Program Files\clisp;
C:\Program Files\IVI Foundation\IVI\bin;
C:\PROGRA~1\IVIFOU~1\VISA\WinNT\Bin;
C:\Program Files\Ghdl\Bin;
c:\iverilog\bin;
C:\Program Files\Lua\5.1;
C:\Program;
C:\Program Files\Git\cmd;
C:\Program Files\Microsoft Windows Performance Toolkit\;
C:\Program Files\Agilent\IO Libraries Suite\bin;
C:\Program Files\IVI Foundation\VISA\WinNT\agvisa;
C:\Program Files\IVI Foundation\VISA\WinNT\Bin\;
C:\Program Files\Calibre2\;
c:\python27\Scripts;
C:\Kivy-1.5.1-w32\python;
C:\Program Files\Microsoft Visual Studio 9.0\VC\bin;
c:\jython;
c:\ds\devkitARM\bin;
c:\MinGW\bin;
c:\Program Files\hidemaru;
C:\Program Files\Vim\vim73;
C:\Program Files\Racket;
c:\altera\11.1\modelsim_ase\win32aloem;
c:\xilinx\14.1\ISE_DS\ISE\lib\nt;
c:\d\windows\bin;
c:\veritakwin;
C:\Xilinx\src\simple_logiana4>\Xilinx\14.1\ISE_DS\ISE\bin\nt
XILINX C:\Xilinx\14.4\ISE_DS\ISE\ C:\Xilinx\14.4\ISE_DS\ISE\ C:\Xilinx\14.4\ISE_DS\ISE\ C:\Xilinx\14.4\ISE_DS\ISE\
XILINXD_LICENSE_FILE C:\Xilinx\14.4\Xilinx.lic C:\Xilinx\14.4\Xilinx.lic C:\Xilinx\14.4\Xilinx.lic C:\Xilinx\14.4\Xilinx.lic
XILINX_DSP C:\Xilinx\14.4\ISE_DS\ISE C:\Xilinx\14.4\ISE_DS\ISE C:\Xilinx\14.4\ISE_DS\ISE C:\Xilinx\14.4\ISE_DS\ISE
XILINX_EDK C:\Xilinx\14.4\ISE_DS\EDK C:\Xilinx\14.4\ISE_DS\EDK C:\Xilinx\14.4\ISE_DS\EDK C:\Xilinx\14.4\ISE_DS\EDK
XILINX_PLANAHEAD C:\Xilinx\14.4\ISE_DS\PlanAhead C:\Xilinx\14.4\ISE_DS\PlanAhead C:\Xilinx\14.4\ISE_DS\PlanAhead C:\Xilinx\14.4\ISE_DS\PlanAhead
XILINX_VIVADO C:\Xilinx\Vivado\2012.4 C:\Xilinx\Vivado\2012.4 C:\Xilinx\Vivado\2012.4 C:\Xilinx\Vivado\2012.4
 
Synthesis Property Settings
Switch Name Property Name Value Default Value
-ifn   simple_logiana.prj  
-ifmt   mixed MIXED
-ofn   simple_logiana  
-ofmt   NGC NGC
-p   xc3s250e-4-vq100  
-top   simple_logiana  
-opt_mode Optimization Goal Speed SPEED
-opt_level Optimization Effort 1 1
-iuc Use synthesis Constraints File NO NO
-keep_hierarchy Keep Hierarchy No NO
-netlist_hierarchy Netlist Hierarchy As_Optimized as_optimized
-rtlview Generate RTL Schematic Yes NO
-glob_opt Global Optimization Goal AllClockNets ALLCLOCKNETS
-read_cores Read Cores YES YES
-sd Cores Search Directories {"ipcore_dir" }  
-write_timing_constraints Write Timing Constraints NO NO
-cross_clock_analysis Cross Clock Analysis NO NO
-bus_delimiter Bus Delimiter <> <>
-slice_utilization_ratio Slice Utilization Ratio 100 100%
-bram_utilization_ratio BRAM Utilization Ratio 100 100%
-verilog2001 Verilog 2001 YES YES
-fsm_extract   YES YES
-fsm_encoding   Auto AUTO
-safe_implementation   No NO
-fsm_style   LUT LUT
-ram_extract   Yes YES
-ram_style   Auto AUTO
-rom_extract   Yes YES
-shreg_extract   YES YES
-rom_style   Auto AUTO
-auto_bram_packing   NO NO
-resource_sharing   YES YES
-async_to_sync   NO NO
-mult_style   Auto AUTO
-iobuf   YES YES
-max_fanout   100000 500
-bufg   24 24
-register_duplication   YES YES
-register_balancing   No NO
-optimize_primitives   NO NO
-use_clock_enable   Yes YES
-use_sync_set   Yes YES
-use_sync_reset   Yes YES
-iob   Auto AUTO
-equivalent_register_removal   YES YES
-slice_utilization_ratio_maxmargin   5 0%
 
Translation Property Settings
Switch Name Property Name Value Default Value
-intstyle   ise None
-dd   _ngo None
-p   xc3s250e-vq100-4 None
-sd Macro Search Path ipcore_dir None
-uc   simple_logiana.ucf None
 
Map Property Settings
Switch Name Property Name Value Default Value
-ir Use RLOC Constraints OFF OFF
-cm Optimization Strategy (Cover Mode) area area
-intstyle   ise None
-o   simple_logiana_map.ncd None
-pr Pack I/O Registers/Latches into IOBs off off
-p   xc3s250e-vq100-4 None
 
Place and Route Property Settings
Switch Name Property Name Value Default Value
-t   1 1
-intstyle   ise  
-ol Place & Route Effort Level (Overall) high std
-w   true false
 
Operating System Information
Operating System Information xst ngdbuild map par
CPU Architecture/Speed Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz/2394 MHz Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz/2394 MHz Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz/2394 MHz Intel(R) Core(TM) i5 CPU M 520 @ 2.40GHz/2394 MHz
Host thinkpad1 thinkpad1 thinkpad1 thinkpad1
OS Name Microsoft Windows 7 , 32-bit Microsoft Windows 7 , 32-bit Microsoft Windows 7 , 32-bit Microsoft Windows 7 , 32-bit
OS Release Service Pack 1 (build 7601) Service Pack 1 (build 7601) Service Pack 1 (build 7601) Service Pack 1 (build 7601)