PWM DAC - (Output Vss to Vdd)

I2C Slave Interface

 

Functional Description

Driver Properties

Driver Specifications

Interface Schematic

 

Functional Description

This device includes an I2C™ register based slave interface. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2C interface supports standard mode speeds up to 400 kbits/s. This I2C interface is compatible with multiple devices on the same bus.

 

The slave address defined for this device represents the 7 most significant bits of the address, with the least significant bit set to one or zero by the master to indicate a write or a read transaction. A second address is provided for ROM/Flash access at 0x40 plus the basic register device address.

 

Protocol Description: The register-based protocol for this device requires a write transaction to set the internal register for the data pointer.

 

Every write transaction will set the data pointer to the first data byte of the transaction. When writing one or more bytes, the byte after the data pointer will be written into the location pointed to by the data pointer byte. The third byte (second data byte) will be written to the data pointer plus 1 and so on. The data pointer will increment for each byte read or written, but will be reset at the beginning of each new read operation.

 

Each read transaction will begin to read data at the location pointed to by the last write transaction’s data pointer. To set the data pointer for a read, a write transaction if performed that only sets the data pointer (one data byte only).

 

If the I2C master attempts to write data to a read-only location or an undefined location, the data will be discarded and will have no affect. Data cannot be read outside the defined range. Any read requests by the master, outside the allotted range will result in invalid data being returned.

 

Hardware Interface: The PSoC I2C pins are configured to directly drive an I2C bus. Appropriate pull-ups must be supplied on both the clock and data lines at some point on the bus. For more information on I2C please Google “Philips I2C specification”.

 

Software Interface: There is no software interface.

 

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Driver Properties

User-Configurable properties.

I2C Address: The base slave address in the range 0 to 63. Addresses 64 to 127 are reserved for ROM/Flash access.

 

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Driver Specifications

Data Rate: 400 kbits/s (max)

 

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Interface Schematic

 

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