Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 

 
Software Version and Target Device
Product Version: ISE:10.1.03 (WebPACK) Target Family: spartan3
OS Platform: NT Target Device: xc3s400
Project ID (random number) 13925.9982.85 Target Package: tq144
Registration ID 1BTJAGMUEMJXSWSEW606G269S Target Speed: -4
Date Generated 金 1 30 14:51:13 2009
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Comparators=12
  • 10-bit comparator greater=2
  • 10-bit comparator less=4
  • 11-bit comparator greatequal=3
  • 11-bit comparator less=2
  • 12-bit comparator less=1
Adders/Subtractors=3
  • 12-bit adder=1
  • 20-bit adder carry out=1
  • 9-bit subtractor=1
Registers=98
  • Flip-Flops=98
Counters=5
  • 10-bit up counter=3
  • 20-bit up counter=1
  • 4-bit up counter=1
MiscellaneousStatistics
  • AGG_BONDED_IO=29
  • AGG_IO=29
  • AGG_SLICE=924
  • NUM_4_INPUT_LUT=1126
  • NUM_BONDED_IOB=29
  • NUM_BUFGMUX=4
  • NUM_CYMUX=395
  • NUM_DCM=1
  • NUM_IOB_FF=9
  • NUM_LUT_RT=89
  • NUM_MULT18X18=7
  • NUM_RAMB16=8
  • NUM_SHIFT=206
  • NUM_SLICEL=750
  • NUM_SLICEM=174
  • NUM_SLICE_FF=1141
  • NUM_XOR=361
  • Xilinx Core blk_mem_gen_v2_8, Xilinx CORE Generator 10.1.03_ip3=3
  • Xilinx Core cordic_v3_0, Xilinx CORE Generator 10.1.03_ip3=1
  • Xilinx Core mult_gen_v10_1, Xilinx CORE Generator 10.1.03_ip3=3
  • Xilinx Core xfft_v6_0, Xilinx CORE Generator 10.1.03_ip3=1
NetStatistics
  • NumNets_Active=1882
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=146
  • NumNodesOfType_Active_BRAMDUMMY=314
  • NumNodesOfType_Active_CLKPIN=798
  • NumNodesOfType_Active_CNTRLPIN=374
  • NumNodesOfType_Active_DOUBLE=4118
  • NumNodesOfType_Active_DUMMY=2275
  • NumNodesOfType_Active_DUMMYBANK=2
  • NumNodesOfType_Active_DUMMYESC=14
  • NumNodesOfType_Active_GLOBAL=170
  • NumNodesOfType_Active_HFULLHEX=20
  • NumNodesOfType_Active_HLONG=4
  • NumNodesOfType_Active_HUNIHEX=367
  • NumNodesOfType_Active_INPUT=3471
  • NumNodesOfType_Active_IOBOUTPUT=14
  • NumNodesOfType_Active_OMUX=1829
  • NumNodesOfType_Active_OUTPUT=1841
  • NumNodesOfType_Active_PREBXBY=696
  • NumNodesOfType_Active_VFULLHEX=83
  • NumNodesOfType_Active_VLONG=6
  • NumNodesOfType_Active_VUNIHEX=128
  • NumNodesOfType_Gnd_BRAMADDR=11
  • NumNodesOfType_Gnd_BRAMDUMMY=84
  • NumNodesOfType_Gnd_CLKPIN=3
  • NumNodesOfType_Gnd_CNTRLPIN=45
  • NumNodesOfType_Gnd_DOUBLE=113
  • NumNodesOfType_Gnd_DUMMY=650
  • NumNodesOfType_Gnd_DUMMYBANK=4
  • NumNodesOfType_Gnd_INPUT=774
  • NumNodesOfType_Gnd_OMUX=268
  • NumNodesOfType_Gnd_OUTPUT=144
  • NumNodesOfType_Gnd_PREBXBY=39
SiteSummary
  • BUFGMUX=4
  • BUFGMUX_GCLKMUX=4
  • BUFGMUX_GCLK_BUFFER=4
  • DCM=1
  • DCM_DCM=1
  • IOB=29
  • IOB_INBUF=14
  • IOB_OFF1=9
  • IOB_OUTBUF=15
  • IOB_PAD=29
  • MULT18X18=7
  • MULT18X18_BLACKBOX=7
  • RAMB16=8
  • RAMB16_RAMB16=8
  • RAMB16_RAMB16A=8
  • RAMB16_RAMB16B=8
  • SLICEL=750
  • SLICEL_C1VDD=9
  • SLICEL_C2VDD=1
  • SLICEL_CYMUXF=188
  • SLICEL_CYMUXG=169
  • SLICEL_F=445
  • SLICEL_F5MUX=69
  • SLICEL_FFX=402
  • SLICEL_FFY=488
  • SLICEL_G=433
  • SLICEL_GNDF=70
  • SLICEL_GNDG=63
  • SLICEL_VDDF=1
  • SLICEL_VDDG=3
  • SLICEL_XORF=170
  • SLICEL_XORG=154
  • SLICEM=174
  • SLICEM_CYMUXF=19
  • SLICEM_CYMUXG=19
  • SLICEM_F=74
  • SLICEM_FFX=78
  • SLICEM_FFY=173
  • SLICEM_G=174
  • SLICEM_GNDF=2
  • SLICEM_GNDG=1
  • SLICEM_WSGEN=155
  • SLICEM_XORF=19
  • SLICEM_XORG=18
 
Configuration Data
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:4]
DCM_DCM
  • CLKDV_DIVIDE=[2:1]
  • CLKOUT_PHASE_SHIFT=[NONE:1]
  • DESKEW_ADJUST=[7:1]
  • DFS_FREQUENCY_MODE=[LOW:1]
  • DLL_FREQUENCY_MODE=[LOW:1]
  • DUTY_CYCLE_CORRECTION=[TRUE:1]
  • FACTORY_JF1=[0X80:1]
  • FACTORY_JF2=[0X80:1]
IOB_OFF1
  • LATCH_OR_FF=[FF:9]
  • OFF1_INIT_ATTR=[INIT0:9]
  • OFF1_SR_ATTR=[SRLOW:9]
  • OFFATTRBOX=[SYNC:9]
IOB_PAD
  • DRIVEATTRBOX=[8:14] [24:1]
  • IOATTRBOX=[LVCMOS33:29]
  • SLEW=[FAST:15]
RAMB16_RAMB16A
  • PORTA_ATTR=[512X36:1] [1024X18:7]
  • WRITEMODEA=[WRITE_FIRST:1] [READ_FIRST:7]
RAMB16_RAMB16B
  • PORTB_ATTR=[512X36:1] [1024X18:7]
  • WRITEMODEB=[WRITE_FIRST:2] [READ_FIRST:6]
SLICEL_FFX
  • FFX_INIT_ATTR=[INIT0:401] [INIT1:1]
  • FFX_SR_ATTR=[SRLOW:402]
  • LATCH_OR_FF=[FF:402]
  • SYNC_ATTR=[ASYNC:347] [SYNC:55]
SLICEL_FFY
  • FFY_INIT_ATTR=[INIT0:488]
  • FFY_SR_ATTR=[SRLOW:487] [SRHIGH:1]
  • LATCH_OR_FF=[FF:488]
  • SYNC_ATTR=[ASYNC:424] [SYNC:64]
SLICEM_F
  • F_ATTR=[SHIFT_REG:51]
  • LUT_OR_MEM=[LUT:23] [RAM:51]
SLICEM_FFX
  • FFX_INIT_ATTR=[INIT0:78]
  • FFX_SR_ATTR=[SRLOW:78]
  • LATCH_OR_FF=[FF:78]
  • SYNC_ATTR=[ASYNC:78]
SLICEM_FFY
  • FFY_INIT_ATTR=[INIT0:173]
  • FFY_SR_ATTR=[SRLOW:173]
  • LATCH_OR_FF=[FF:173]
  • SYNC_ATTR=[ASYNC:173]
SLICEM_G
  • G_ATTR=[SHIFT_REG:155]
  • LUT_OR_MEM=[LUT:19] [RAM:155]
SLICEM_WSGEN
  • SYNC_ATTR=[ASYNC:155]
 
Pin Data
BUFGMUX
  • I0=4
  • O=4
  • S=4
BUFGMUX_GCLKMUX
  • I0=4
  • OUT=4
  • S=4
BUFGMUX_GCLK_BUFFER
  • IN=4
  • OUT=4
DCM
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
DCM_DCM
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
IOB
  • I=14
  • O1=15
  • OCE=9
  • OTCLK1=9
  • PAD=29
  • SR=9
IOB_INBUF
  • IN=14
  • OUT=14
IOB_OFF1
  • CE=9
  • CK=9
  • D=9
  • Q=9
  • SR=9
IOB_OUTBUF
  • IN=15
  • OUT=15
IOB_PAD
  • PAD=29
MULT18X18
  • A0=7
  • A1=7
  • A10=7
  • A11=7
  • A12=7
  • A13=7
  • A14=7
  • A15=7
  • A16=7
  • A17=7
  • A2=7
  • A3=7
  • A4=7
  • A5=7
  • A6=7
  • A7=7
  • A8=7
  • A9=7
  • B0=7
  • B1=7
  • B10=7
  • B11=7
  • B12=7
  • B13=7
  • B14=7
  • B15=7
  • B16=7
  • B17=7
  • B2=7
  • B3=7
  • B4=7
  • B5=7
  • B6=7
  • B7=7
  • B8=7
  • B9=7
  • CE=5
  • CLK=5
  • P0=6
  • P1=6
  • P10=7
  • P11=7
  • P12=7
  • P13=7
  • P14=7
  • P15=5
  • P16=5
  • P17=5
  • P18=5
  • P19=5
  • P2=6
  • P20=3
  • P21=2
  • P22=2
  • P23=2
  • P24=2
  • P25=2
  • P26=2
  • P27=2
  • P28=2
  • P3=6
  • P4=6
  • P5=6
  • P6=6
  • P7=6
  • P8=6
  • P9=6
  • RST=5
MULT18X18_BLACKBOX
  • A0=7
  • A1=7
  • A10=7
  • A11=7
  • A12=7
  • A13=7
  • A14=7
  • A15=7
  • A16=7
  • A17=7
  • A2=7
  • A3=7
  • A4=7
  • A5=7
  • A6=7
  • A7=7
  • A8=7
  • A9=7
  • B0=7
  • B1=7
  • B10=7
  • B11=7
  • B12=7
  • B13=7
  • B14=7
  • B15=7
  • B16=7
  • B17=7
  • B2=7
  • B3=7
  • B4=7
  • B5=7
  • B6=7
  • B7=7
  • B8=7
  • B9=7
  • CE=5
  • CLK=5
  • P0=6
  • P1=6
  • P10=7
  • P11=7
  • P12=7
  • P13=7
  • P14=7
  • P15=5
  • P16=5
  • P17=5
  • P18=5
  • P19=5
  • P2=6
  • P20=3
  • P21=2
  • P22=2
  • P23=2
  • P24=2
  • P25=2
  • P26=2
  • P27=2
  • P28=2
  • P3=6
  • P4=6
  • P5=6
  • P6=6
  • P7=6
  • P8=6
  • P9=6
  • RST=5
RAMB16
  • ADDRA10=8
  • ADDRA11=8
  • ADDRA12=8
  • ADDRA13=8
  • ADDRA4=7
  • ADDRA5=8
  • ADDRA6=8
  • ADDRA7=8
  • ADDRA8=8
  • ADDRA9=8
  • ADDRB10=8
  • ADDRB11=8
  • ADDRB12=8
  • ADDRB13=8
  • ADDRB4=7
  • ADDRB5=8
  • ADDRB6=8
  • ADDRB7=8
  • ADDRB8=8
  • ADDRB9=8
  • CLKA=8
  • CLKB=8
  • DIA0=6
  • DIA1=6
  • DIA10=6
  • DIA11=6
  • DIA12=6
  • DIA13=6
  • DIA14=6
  • DIA15=6
  • DIA16=1
  • DIA17=1
  • DIA18=1
  • DIA19=1
  • DIA2=6
  • DIA20=1
  • DIA21=1
  • DIA22=1
  • DIA23=1
  • DIA24=1
  • DIA25=1
  • DIA26=1
  • DIA27=1
  • DIA28=1
  • DIA29=1
  • DIA3=6
  • DIA30=1
  • DIA31=1
  • DIA4=6
  • DIA5=6
  • DIA6=6
  • DIA7=6
  • DIA8=6
  • DIA9=6
  • DIB0=1
  • DIB1=1
  • DIB10=1
  • DIB11=1
  • DIB12=1
  • DIB13=1
  • DIB14=1
  • DIB15=1
  • DIB2=1
  • DIB3=1
  • DIB4=1
  • DIB5=1
  • DIB6=1
  • DIB7=1
  • DIB8=1
  • DIB9=1
  • DIPA0=6
  • DIPA1=6
  • DIPA2=1
  • DIPA3=1
  • DIPB0=2
  • DIPB1=2
  • DOA0=2
  • DOA1=2
  • DOA10=2
  • DOA11=2
  • DOA12=1
  • DOA2=2
  • DOA3=2
  • DOA4=2
  • DOA5=2
  • DOA6=1
  • DOA7=1
  • DOA8=2
  • DOA9=2
  • DOB0=7
  • DOB1=7
  • DOB10=4
  • DOB11=4
  • DOB12=3
  • DOB13=2
  • DOB14=2
  • DOB15=2
  • DOB16=1
  • DOB17=1
  • DOB2=7
  • DOB24=1
  • DOB25=1
  • DOB3=6
  • DOB4=4
  • DOB5=4
  • DOB6=3
  • DOB7=3
  • DOB8=5
  • DOB9=5
  • DOPB0=2
  • DOPB1=2
  • ENA=8
  • ENB=8
  • SSRA=8
  • SSRB=8
  • WEA=8
  • WEB=8
RAMB16_RAMB16
  • ADDRA=8
  • ADDRB=8
  • DIA=8
  • DIB=8
  • DOA=8
  • DOB=8
RAMB16_RAMB16A
  • ADDRA=8
  • ADDRA10=8
  • ADDRA11=8
  • ADDRA12=8
  • ADDRA13=8
  • ADDRA4=7
  • ADDRA5=8
  • ADDRA6=8
  • ADDRA7=8
  • ADDRA8=8
  • ADDRA9=8
  • CLKA=8
  • DIA=8
  • DIA0=6
  • DIA1=6
  • DIA10=6
  • DIA11=6
  • DIA12=6
  • DIA13=6
  • DIA14=6
  • DIA15=6
  • DIA16=1
  • DIA17=1
  • DIA18=1
  • DIA19=1
  • DIA2=6
  • DIA20=1
  • DIA21=1
  • DIA22=1
  • DIA23=1
  • DIA24=1
  • DIA25=1
  • DIA26=1
  • DIA27=1
  • DIA28=1
  • DIA29=1
  • DIA3=6
  • DIA30=1
  • DIA31=1
  • DIA4=6
  • DIA5=6
  • DIA6=6
  • DIA7=6
  • DIA8=6
  • DIA9=6
  • DIPA0=6
  • DIPA1=6
  • DIPA2=1
  • DIPA3=1
  • DOA=8
  • DOA0=2
  • DOA1=2
  • DOA10=2
  • DOA11=2
  • DOA12=1
  • DOA2=2
  • DOA3=2
  • DOA4=2
  • DOA5=2
  • DOA6=1
  • DOA7=1
  • DOA8=2
  • DOA9=2
  • ENA=8
  • SSRA=8
  • WEA=8
RAMB16_RAMB16B
  • ADDRB=8
  • ADDRB10=8
  • ADDRB11=8
  • ADDRB12=8
  • ADDRB13=8
  • ADDRB4=7
  • ADDRB5=8
  • ADDRB6=8
  • ADDRB7=8
  • ADDRB8=8
  • ADDRB9=8
  • CLKB=8
  • DIB=8
  • DIB0=1
  • DIB1=1
  • DIB10=1
  • DIB11=1
  • DIB12=1
  • DIB13=1
  • DIB14=1
  • DIB15=1
  • DIB2=1
  • DIB3=1
  • DIB4=1
  • DIB5=1
  • DIB6=1
  • DIB7=1
  • DIB8=1
  • DIB9=1
  • DIPB0=2
  • DIPB1=2
  • DOB=8
  • DOB0=7
  • DOB1=7
  • DOB10=4
  • DOB11=4
  • DOB12=3
  • DOB13=2
  • DOB14=2
  • DOB15=2
  • DOB16=1
  • DOB17=1
  • DOB2=7
  • DOB24=1
  • DOB25=1
  • DOB3=6
  • DOB4=4
  • DOB5=4
  • DOB6=3
  • DOB7=3
  • DOB8=5
  • DOB9=5
  • DOPB0=2
  • DOPB1=2
  • ENB=8
  • SSRB=8
  • WEB=8
SLICEL
  • BX=234
  • BY=295
  • CE=159
  • CIN=167
  • CLK=595
  • COUT=169
  • F1=415
  • F2=329
  • F3=234
  • F4=88
  • G1=411
  • G2=340
  • G3=247
  • G4=86
  • SR=42
  • X=129
  • XQ=402
  • Y=138
  • YQ=488
SLICEL_C1VDD
  • 1=9
SLICEL_C2VDD
  • 1=1
SLICEL_CYMUXF
  • 0=187
  • 1=188
  • OUT=188
  • S0=188
SLICEL_CYMUXG
  • 0=166
  • 1=169
  • OUT=169
  • S0=169
SLICEL_F
  • A1=415
  • A2=329
  • A3=234
  • A4=88
  • D=445
SLICEL_F5MUX
  • F=69
  • G=69
  • OUT=69
  • S0=69
SLICEL_FFX
  • CE=88
  • CK=402
  • D=402
  • Q=402
  • REV=2
  • SR=32
SLICEL_FFY
  • CE=154
  • CK=488
  • D=488
  • Q=488
  • REV=5
  • SR=36
SLICEL_G
  • A1=408
  • A2=340
  • A3=247
  • A4=86
  • D=433
SLICEL_GNDF
  • 0=70
SLICEL_GNDG
  • 0=63
SLICEL_VDDF
  • 1=1
SLICEL_VDDG
  • 1=3
SLICEL_XORF
  • 0=170
  • 1=170
  • O=170
SLICEL_XORG
  • 0=154
  • 1=154
  • O=154
SLICEM
  • BX=59
  • BY=155
  • CIN=19
  • CLK=173
  • COUT=19
  • F1=74
  • F2=74
  • F3=63
  • F4=51
  • G1=174
  • G2=174
  • G3=166
  • G4=155
  • SR=155
  • XQ=78
  • YQ=173
SLICEM_CYMUXF
  • 0=19
  • 1=19
  • OUT=19
  • S0=19
SLICEM_CYMUXG
  • 0=19
  • 1=19
  • OUT=19
  • S0=19
SLICEM_F
  • A1=74
  • A2=74
  • A3=63
  • A4=51
  • D=74
  • DI=51
  • WS=51
SLICEM_FFX
  • CK=78
  • D=78
  • Q=78
SLICEM_FFY
  • CK=173
  • D=173
  • Q=173
SLICEM_G
  • A1=174
  • A2=174
  • A3=166
  • A4=155
  • D=174
  • DI=155
  • WS=155
SLICEM_GNDF
  • 0=2
SLICEM_GNDG
  • 0=1
SLICEM_WSGEN
  • CK=155
  • WE=155
  • WSF=51
  • WSG=155
SLICEM_XORF
  • 0=19
  • 1=19
  • O=19
SLICEM_XORG
  • 0=18
  • 1=18
  • O=18
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s400-tq144-4 -cm area -pr b -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s400-tq144-4 -cm area -pr b -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
>
Software Quality
Run Statistics
ProgramRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 3 2 0 0 0 0 0
arwz 28 28 0 0 0 0 0
bitgen 34 34 0 0 0 0 0
edif2ngd 12 12 0 0 0 0 0
map 42 41 0 0 0 0 0
netgen 12 12 0 0 0 0 0
ngcbuild 19 19 0 0 0 0 0
ngdbuild 45 45 0 0 0 0 0
obngc 1 1 0 0 0 0 0
par 41 33 8 0 0 0 0
trce 33 33 0 0 0 0 0
xawinfo 22 22 0 0 0 0 0
xst 64 64 0 0 0 0 0
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=ISE Simulator (VHDL/Verilog)
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=Verilog
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_COREGEN=7 FILE_UCF=1
FILE_VERILOG=4 FILE_XAW=1
PROPEXT_xilxBitgCfg_Rate_spartan3=12 PROP_DevDevice=xc3s400
PROP_DevFamily=Spartan3 PROP_DevPackage=tq144
PROP_DevSpeed=-4 PROP_FitterReportFormat=HTML
PROP_Simulator=ISE Simulator (VHDL/Verilog) PROP_SynthOptEffort=High
PROP_UserConstraintEditorPreference=Constraints Editor PROP_UserEditorCustomSetting="C:\\Program Files\\MIW7\\MIW.EXE" $1+$2
PROP_UserEditorPreference=Custom PROP_xilxMapPackRegInto=For Inputs and Outputs
PROP_xilxPAReffortLevel=High Project duration(days)=34
 
Core Statistics
Core Type=blk_mem_gen_v2_8
c_addra_width=10 c_addrb_width=10 c_algorithm=1 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=0 c_has_enb=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_ssra=0 c_has_ssrb=0 c_init_file_name=no_coe_file_loaded c_load_init_file=0
c_mem_type=1 c_mux_pipeline_stages=0 c_prim_type=1 c_read_depth_a=1024
c_read_depth_b=1024 c_read_width_a=11 c_read_width_b=11 c_sim_collision_check=ALL
c_sinita_val=0 c_sinitb_val=0 c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=0 c_use_ecc=0 c_use_ramb16bwer_rst_bhv=0 c_wea_width=1
c_web_width=1 c_write_depth_a=1024 c_write_depth_b=1024 c_write_mode_a=READ_FIRST
c_write_mode_b=READ_FIRST c_write_width_a=11 c_write_width_b=11
Core Type=blk_mem_gen_v2_8
c_addra_width=9 c_addrb_width=9 c_algorithm=1 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=0 c_has_enb=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_ssra=0 c_has_ssrb=0 c_init_file_name=no_coe_file_loaded c_load_init_file=0
c_mem_type=1 c_mux_pipeline_stages=0 c_prim_type=1 c_read_depth_a=512
c_read_depth_b=512 c_read_width_a=9 c_read_width_b=9 c_sim_collision_check=ALL
c_sinita_val=0 c_sinitb_val=0 c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=0 c_use_ecc=0 c_use_ramb16bwer_rst_bhv=0 c_wea_width=1
c_web_width=1 c_write_depth_a=512 c_write_depth_b=512 c_write_mode_a=READ_FIRST
c_write_mode_b=READ_FIRST c_write_width_a=9 c_write_width_b=9
Core Type=xfft_v6_0
c_arch=4 c_bram_stages=0 c_channels=1 c_data_mem_type=1
c_fast_cmpy=0 c_has_bfp=0 c_has_ce=0 c_has_cyclic_prefix=0
c_has_natural_output=1 c_has_nfft=0 c_has_ovflo=0 c_has_rounding=0
c_has_scaling=0 c_has_sclr=0 c_input_width=11 c_nfft_max=10
c_optimize=0 c_output_width=22 c_reorder_mem_type=1 c_twiddle_mem_type=1
c_twiddle_width=11 c_use_flt_pt=0 c_use_hybrid_ram=0
Core Type=mult_gen_v10_1
c_a_type=0 c_a_width=11 c_b_type=0 c_b_value=10000001
c_b_width=11 c_ccm_imp=0 c_ce_overrides_sclr=0 c_has_ce=0
c_has_sclr=0 c_has_zero_detect=0 c_latency=2 c_mult_type=1
c_optimize_goal=1 c_out_high=20 c_out_low=10 c_round_output=0
c_round_pt=0
Core Type=mult_gen_v10_1
c_a_type=0 c_a_width=11 c_b_type=0 c_b_value=10000001
c_b_width=11 c_ccm_imp=0 c_ce_overrides_sclr=0 c_has_ce=0
c_has_sclr=0 c_has_zero_detect=0 c_latency=0 c_mult_type=1
c_optimize_goal=1 c_out_high=19 c_out_low=0 c_round_output=0
c_round_pt=0
Core Type=blk_mem_gen_v2_8
c_addra_width=10 c_addrb_width=10 c_algorithm=1 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=0 c_has_enb=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_ssra=0 c_has_ssrb=0 c_init_file_name=rom_11x1024.mif c_load_init_file=1
c_mem_type=3 c_mux_pipeline_stages=0 c_prim_type=1 c_read_depth_a=1024
c_read_depth_b=1024 c_read_width_a=11 c_read_width_b=11 c_sim_collision_check=ALL
c_sinita_val=0 c_sinitb_val=0 c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=0 c_use_ecc=0 c_use_ramb16bwer_rst_bhv=0 c_wea_width=1
c_web_width=1 c_write_depth_a=1024 c_write_depth_b=1024 c_write_mode_a=WRITE_FIRST
c_write_mode_b=WRITE_FIRST c_write_width_a=11 c_write_width_b=11