Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 

 
Software Version and Target Device
Product Version: ISE:10.1 (WebPACK) Target Family: spartan3a
OS Platform: NT Target Device: xc3s700a
Project ID (random number) 24027.24027.19 Target Package: fg484
Registration ID 180AANBHYMJXSWSEWCKXG2TW6 Target Speed: -5
Date Generated 日 12 14 10:26:44 2008
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=2
  • 12-bit adder=2
Registers=54
  • Flip-Flops=54
RAMs=3
  • 4096x8-bit single-port block RAM=3
Accumulators=1
  • 32-bit up accumulator=1
MiscellaneousStatistics
  • AGG_BONDED_IO=19
  • AGG_IO=19
  • AGG_SLICE=43
  • NUM_4_INPUT_LUT=54
  • NUM_BONDED_IBUF=1
  • NUM_BONDED_IOB=18
  • NUM_BUFGMUX=1
  • NUM_CYMUX=51
  • NUM_LUT_RT=37
  • NUM_RAMB16BWE=6
  • NUM_SLICEL=43
  • NUM_SLICE_FF=84
  • NUM_XOR=51
NetStatistics
  • NumNets_Active=148
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=72
  • NumNodesOfType_Active_BRAMDUMMY=18
  • NumNodesOfType_Active_CLKPIN=49
  • NumNodesOfType_Active_DOUBLE=229
  • NumNodesOfType_Active_DUMMY=55
  • NumNodesOfType_Active_DUMMYBANK=60
  • NumNodesOfType_Active_DUMMYESC=1
  • NumNodesOfType_Active_GLOBAL=27
  • NumNodesOfType_Active_HFULLHEX=4
  • NumNodesOfType_Active_HUNIHEX=17
  • NumNodesOfType_Active_INPUT=200
  • NumNodesOfType_Active_IOBOUTPUT=1
  • NumNodesOfType_Active_OMUX=125
  • NumNodesOfType_Active_OUTPUT=128
  • NumNodesOfType_Active_PREBXBY=46
  • NumNodesOfType_Active_VFULLHEX=23
  • NumNodesOfType_Active_VLONG=5
  • NumNodesOfType_Active_VUNIHEX=49
  • NumNodesOfType_Gnd_BRAMDUMMY=30
  • NumNodesOfType_Gnd_DOUBLE=16
  • NumNodesOfType_Gnd_INPUT=33
  • NumNodesOfType_Gnd_OMUX=16
  • NumNodesOfType_Gnd_OUTPUT=8
  • NumNodesOfType_Gnd_PREBXBY=3
  • NumNodesOfType_Gnd_VFULLHEX=4
  • NumNodesOfType_Vcc_BRAMDUMMY=30
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_INPUT=30
  • NumNodesOfType_Vcc_VCCOUT=25
SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IBUF=1
  • IBUF_DELAY_ADJ_BBOX=1
  • IBUF_INBUF=1
  • IBUF_PAD=1
  • IOB=18
  • IOB_OUTBUF=18
  • IOB_PAD=18
  • RAMB16BWE=6
  • RAMB16BWE_RAMB16BWE=6
  • SLICEL=43
  • SLICEL_C1VDD=13
  • SLICEL_C2VDD=3
  • SLICEL_CYMUXF=26
  • SLICEL_CYMUXG=25
  • SLICEL_F=28
  • SLICEL_FFX=43
  • SLICEL_FFY=41
  • SLICEL_G=26
  • SLICEL_GNDF=13
  • SLICEL_GNDG=22
  • SLICEL_XORF=25
  • SLICEL_XORG=26
 
Configuration Data
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:1]
  • IBUF_DELAY_VALUE=[DLY0:1]
  • IFD_DELAY_VALUE=[DLY0:1]
IBUF_PAD
  • IOATTRBOX=[LVCMOS25:1]
IOB_OUTBUF
  • SUSPEND=[3STATE:18]
IOB_PAD
  • DRIVEATTRBOX=[12:18]
  • IOATTRBOX=[LVCMOS25:18]
  • SLEW=[SLOW:18]
RAMB16BWE_RAMB16BWE
  • DATA_WIDTH_A=[4:6]
  • DATA_WIDTH_B=[0:6]
  • WRITE_MODE_A=[WRITE_FIRST:6]
  • WRITE_MODE_B=[WRITE_FIRST:6]
SLICEL_FFX
  • FFX_INIT_ATTR=[INIT0:43]
  • FFX_SR_ATTR=[SRLOW:43]
  • LATCH_OR_FF=[FF:43]
  • SYNC_ATTR=[ASYNC:43]
SLICEL_FFY
  • FFY_INIT_ATTR=[INIT0:41]
  • FFY_SR_ATTR=[SRLOW:41]
  • LATCH_OR_FF=[FF:41]
  • SYNC_ATTR=[ASYNC:41]
 
Pin Data
BUFGMUX
  • I0=1
  • O=1
  • S=1
BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
IBUF
  • I=1
  • PAD=1
IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=1
  • SEL_IN=1
IBUF_INBUF
  • IN=1
  • OUT=1
IBUF_PAD
  • PAD=1
IOB
  • O1=18
  • PAD=18
IOB_OUTBUF
  • IN=18
  • OUT=18
IOB_PAD
  • PAD=18
RAMB16BWE
  • ADDRA10=6
  • ADDRA11=6
  • ADDRA12=6
  • ADDRA13=6
  • ADDRA2=6
  • ADDRA3=6
  • ADDRA4=6
  • ADDRA5=6
  • ADDRA6=6
  • ADDRA7=6
  • ADDRA8=6
  • ADDRA9=6
  • CLKA=6
  • DOA0=3
  • DOA1=3
  • DOA2=6
  • DOA3=6
  • ENA=6
  • SSRA=6
  • WEA0=6
  • WEA1=6
  • WEA2=6
  • WEA3=6
  • WEB0=6
  • WEB1=6
  • WEB2=6
  • WEB3=6
RAMB16BWE_RAMB16BWE
  • ADDRA10=6
  • ADDRA11=6
  • ADDRA12=6
  • ADDRA13=6
  • ADDRA2=6
  • ADDRA3=6
  • ADDRA4=6
  • ADDRA5=6
  • ADDRA6=6
  • ADDRA7=6
  • ADDRA8=6
  • ADDRA9=6
  • CLKA=6
  • DOA0=3
  • DOA1=3
  • DOA2=6
  • DOA3=6
  • ENA=6
  • SSRA=6
  • WEA0=6
  • WEA1=6
  • WEA2=6
  • WEA3=6
  • WEB0=6
  • WEB1=6
  • WEB2=6
  • WEB3=6
SLICEL
  • BX=18
  • BY=15
  • CIN=25
  • CLK=43
  • COUT=25
  • F1=28
  • G1=26
  • XQ=43
  • YQ=41
SLICEL_C1VDD
  • 1=13
SLICEL_C2VDD
  • 1=3
SLICEL_CYMUXF
  • 0=26
  • 1=26
  • OUT=26
  • S0=26
SLICEL_CYMUXG
  • 0=25
  • 1=25
  • OUT=25
  • S0=25
SLICEL_F
  • A1=28
  • D=28
SLICEL_FFX
  • CK=43
  • D=43
  • Q=43
SLICEL_FFY
  • CK=41
  • D=41
  • Q=41
SLICEL_G
  • A1=26
  • D=26
SLICEL_GNDF
  • 0=13
SLICEL_GNDG
  • 0=22
SLICEL_XORF
  • 0=25
  • 1=25
  • O=25
SLICEL_XORG
  • 0=26
  • 1=26
  • O=26
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700a-fg484-5 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -e 3 -s 5 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
bitgen 19 19 0 0 0 0 0
map 17 17 0 0 0 0 0
ngdbuild 19 19 0 0 0 0 0
par 17 17 0 0 0 0 0
trce 17 17 0 0 0 0 0
xst 31 31 0 0 0 0 0
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=ISE Simulator (VHDL/Verilog)
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=VHDL
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_UCF=1 FILE_VHDL=2
PROP_DevDevice=xc3s700a PROP_DevFamily=Spartan3A and Spartan3AN
PROP_DevPackage=fg484 PROP_FitterReportFormat=HTML
PROP_PreferredLanguage=VHDL PROP_UserConstraintEditorPreference=Constraints Editor
Project duration(days)=5